Background

This document describes the procedure to change the bias voltages configuration files of the DEIMOS CCDs (either FCS or science detectors). This procedure should be followed every time that a video board is replaced if the restart command in the CCD crates issues an error regarding biases out of tolerance.

IMPORTANT: Modifying the detector volatges can damage the CCD irremediably if it is done incorrectly. If you are not sure of how to do it, contact the Instrument Scientist for advise.

Procedure

Modifying bias voltages in the science detector

  1. Reboot the science CCD crate following these instructions once the new video board has been installed. In most cases, only a sof reboot will be needed. It is rarely necessary to power cycle the crate manually.
  2. Login as user kics at keamano.
  3. cd /export/vx/deivme/dsp/voltages
  4. If during the crate restart process you find an error like:
          Bias voltages for CCD 1
          CCD 1 bias  0 ADC 3435 ( d6b) MUX  2.026 Volts 20.258  Vdd-1
          Invalid voltage 20.258 for Vdd-1 on CCD 1; should be 20.390
          CCD 1 bias  1 ADC 3435 ( d6b) MUX  2.026 Volts 20.258  Vdd-2
          Invalid voltage 20.258 for Vdd-2 on CCD 1; should be 20.390
          ...
          Open clock voltages are all within tolerance
          2 bias and 0 clock voltages are out of tolerance
          Analog switch will remain open; startup aborted
          value = -10 = 0xfffffff6 = lzo_ptr.o_bss + 0xff023af6
        
    then, the bias voltage configuration files should be changed accordingly.
  5. Make a backup copy of the current configuration file containing the voltages causing the error. The possible files that may need to be edited are:
          bias_voltages_open
          bias_voltages_closed
          clock_voltages_open
          clock_voltages_closed
        
  6. Edit the file with the voltages out of tolerance. For instance, the modification required to eliminate the error described in the example above would be to change the following lines in the file bias_voltages_open:
          1 0 3434  2.024 20.390
          1 1 3435  2.026 20.390
        
    to
          1 0 3434  2.024 20.258
          1 1 3435  2.026 20.258
        
  7. In the CCD crate prompt type:
          < restart
        
    verify that it completes without error,
          < broadcast
        
    verify that it completes without error,
          < dewartemp
        
    verify that it completes without error,
          < ups
        
    verify that it completes without error.
  8. Record the changes in the README file located in the directory /export/vx/deivme/dsp/voltages.

Modifying bias voltages in the FCS detector

  1. Reboot the FCS CCD crate following these instructions once the new video board has been installed. In most cases, only a sof reboot will be needed. It is rarely necessary to power cycle the crate manually.
    You may get the following communication error in the crate telnet prompt:
          Timeout waiting for ISERV, retrying
          Got network configuration
          Broadcast message sent on ln0
          Broadcast not sent on lo0
        
    This error can be ignored. It will go away once the DEIMOS software is restarted after a successful crate restart.
  2. Login as user kics at keamano.
  3. cd /export/vx/fcsvme/dsp/voltages
  4. If during the crate restart process you find an error like:
          Bias voltages for CCD 1
          CCD 1 bias  0 ADC 3435 ( d6b) MUX  2.026 Volts 20.258  Vdd-1
          Invalid voltage 20.258 for Vdd-1 on CCD 1; should be 20.390
          CCD 1 bias  1 ADC 3435 ( d6b) MUX  2.026 Volts 20.258  Vdd-2
          Invalid voltage 20.258 for Vdd-2 on CCD 1; should be 20.390
          ...
          Open clock voltages are all within tolerance
          2 bias and 0 clock voltages are out of tolerance
          Analog switch will remain open; startup aborted
          value = -10 = 0xfffffff6 = lzo_ptr.o_bss + 0xff023af6
        
    then, the bias voltage configuration files should be changed accordingly.
  5. Make a backup copy of the current configuration file containing the voltages causing the error. The possible files that may need to be edited are:
          bias_voltages_open
          bias_voltages_closed
          clock_voltages_open
          clock_voltages_closed
        
  6. Edit the file with the voltages out of tolerance. For instance, the modification required to eliminate the error described in the example above would be to change the following lines in the file bias_voltages_open:
          1 0 3434  2.024 20.390
          1 1 3435  2.026 20.390
        
    to
          1 0 3434  2.024 20.258
          1 1 3435  2.026 20.258
        
  7. In the CCD crate prompt type:
          shutdown
        
    The output should look like:
          shutdown
          Have entered shutdown routine
          Setting exit flags for monitor processes
          Waiting for monitor processes to shutdown
          Sending STP command to TIMING board
          Sending LOR command to TIMING board
          RD bias voltages have all been set to minimum voltage
          Analog switches in dewar electronics commanded open
          Analog switches in dewar electronics indicate open
          Analog power has been commanded off
          Now switch off main power at controller
          value = 0 = 0x0
        
    Once, the prompt is back, type
          < restart
        
  8. Record the changes in the README file located in the directory /export/vx/fcsvme/dsp/voltages.